Hardware and Integration

Hardware Evaluation

Memory Technologies

Principal Investigators: Maya Gokhale, lead, Lawrence Livermore National Laboratory; Gwen Voskuilen, Sandia National Laboratories; Jeffrey S. Vetter, Oak Ridge National Laboratory (ORNL)

The Memory Technologies Working Group is responsible for providing ECP teams with memory hardware and architecture expertise and will perform two types of studies: (1) partnering with facilities, ECP Application Development (AD) and Software Technology (ST) teams, and hardware vendors on studies on the effects on application performance and scaling that arise from decisions relating to the selection of memory components, media, and subsystem design; and (2) performing studies on bottlenecks on exascale-class designs or prototypes, and, in particular, these studies will be linked to identifying important bottlenecks in expected PathForward designs.

The basis for the Memory Technology group studies will be established through simulation and emulation technologies funded in previous US Department of Energy research programs. Memory traces and/or memory access patterns (“generators” or “motifs”) will be captured (by either Hardware Evaluation (HE) or by AD/ST teams directly using HE tools to replicate important families of ECP-AD or ST kernels. Where possible, any traces and models will be shared with ECP PathForward vendors as requested.